Wednesday, 23 July 2014 10:17

AMD looking to Stacked DRAM for Future APUs

One of the items we have always beat AMD up on is there poor memory performance in their CPUs and APUs. This little issue is what has separated AMD from Intel since the AM2 days. It has always been understood that latency has a massive impact on an internal memory controller. As you latency increases your efficiency decreases. You can offset some of this by enlarging your cache and also optimizing the CPU to use it more efficiently. This is one area that AMD has traditionally had issues with, even going back to the Athlon 64 we saw them reducing cache sizes to remove problems and bump performance.