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MIPS architecture for hardware virtualization

by on17 December 2012 2513 times
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MIPS has unveiled a new edition of its processor architecture, the "release 5" which inherits the "release 3". With the new architecture, MIPS hopes to improve their standing in the competition with ARM, and the most important features include hardware-assisted virtualization, and new SIMD instructions. There is also improved support for multi-threaded execution, and the address space for 32-bit architecture has also been upgraded.

The MIPS processor architecture is not the most popular, but is used in a large number of dedicated devices including measuring and network equipment. Recently we saw a few tablets and "smart" mobile phones based on the MIPS architecture's appearing on the market, but these are very few, and they are mostly used by an unknown Chinese manufacturer.

Because of Chinese customers the company skipped "release 4" in the labeling of the MIPS-architecture. Specifically, four in Chinese reads "Si", which is very similar to the pronunciation of the Chinese word for death, and therefore the number four is considered unlucky.

[Ed – ARM is going to face increasing competition from other RISC manufacturers as well as x86 CPU makers. This is simply because the market is such a lucrative one and many companies have been eager to cash in on the craze. It is going to be an interesting next couple of years especially considering the fact that Intel is now coming to the game in force. This last item is actually a larger threat to MIPS than it is to ARM manufacturers like nVidia, Samsung, Qualcomm and Texas Instrument. We will have to wait and see hope the market adapts to competing products from ARM, MIPS and x86…]

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Last modified on 17 December 2012
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